February 1st 2026
In conjunction with the 32nd International Symposium on
High-Performance Computer Architecture (HPCA 2026)
Recent papers from Meta (Facebook) and Google 1 2 3 have created a major concern about data integrity in large-scale computing in cloud data centers. The term “mercurial cores” has been coined 2 to refer to errant processor cores that have been clearly diagnosed as being the source of generating silent data errors – and recent panels (as referred to above) have brought together experts from cloud service providers and processor chip designers with the objective of raising awareness of this acute problem, and also encouraging leading edge research to devise affordable chip and system-level mitigation solutions. In addition to such data integrity concerns, the rise of data security and privacy breaches in cloud computing environments has accelerated research and development of practical solutions that enable computing with encrypted data (e.g., advanced cryptographic methods like Fully Homomorphic Computing or FHE); e.g., recent papers 4 5 6 7.
This workshop (DISCC-2026) proposes to bring together aspects of data integrity and security in a single, unified forum. The workshop will comprise of a keynote speech, several contributed papers and, time permitting, a closing panel session involving leading edge experts in data integrity and security in a hyper-scale cloud computing setting. Potential speakers are encouraged to submit an extended abstract (1-2 pages) highlighting the key contributions in the light of the above-stated technical scope of the problem. Solution approaches at the algorithm, software/firmware and/or hardware level are encouraged for early dissemination and discussion in w workshop setting. Papers dealing with testing (or detection, diagnosis) of silent data errors or of malicious data breaches are solicited. Similarly, cost-effective mitigation solutions are invited for presentation.
Topics of interest include but are not limited to:
Submitted manuscripts must be in English of up to 2 pages (with same formatting guidelines as main conference). Submissions should be submitted to the following link by December 19th, 2025. If you have questions regarding submission, please contact us: info@discc-workshop.org
To be announced
Pradip Bose is a Distinguished Research Scientist and manager of Efficient and Resilient Systems at IBM T. J. Watson Research Center. He has over 40 years of experience at IBM and was a member of the pioneering RISC super scalar project at IBM (a pre-cursor to the first RS/6000 system product). He holds M.S. and Ph.D. degrees from University of Illinois at Urbana-Champaign. He is a member of IBM’s elite Academy of Technology and he is a Fellow of the IEEE.
Jennifer Dworak is a Professor of Electrical and Computer Engineering at Southern Methodist University. She holds M.S. and Ph.D degrees from Texas A\&M University. Her research areas of expertise and interest include hardware security and reliability testing of integrated circuits.
Subhasish Mitra is a Professor (Depts. of Electrical Engineering and Computer Science) at Stanford University, where he leads the Robust Systems Group (among several other leadership roles). Among his many achievements, he won the IEEE Computer Society Harry H. Goode Memorial Award "for sustained contributions to design and test of computing systems in established and emerging technologies," in 2022. He is a Fellow of the IEEE and of the ACM.
Dimitris Gizopoulos is a Professor in the Department of Informatics and Telecommunications at the University of Athens, where he leads the Computer Architecture Laboratory. His group's research focuses on the areas of Computer Architecture and Computer Systems, and in particular on fault/error tolerance, design correctness validation and their relation to performance and energy-efficiency for microprocessors, microprocessor-based systems, as well as systems based on accelerators such as GPUs or AIAs (AI Accelerators).
Chris Wilkerson is a Principal Engineer at Intel Corporation. Chris has 12 years of experience at Intel including 10 years at different Intel research labs, and two in the product micro-architecture team. His areas of expertise include: circuits, processor design, micro-architecture, architecture. In particular, his specialties are: low-voltage circuits, low-voltage micro architecture, low power, reliable design, out-of-order processor design with particular focus on branch prediction, runahead processing, cache design, cache replacement algorithms, etc.
Nandhini Chandramoorthy is a Senior Research Scientist at IBM T. J. Watson Research Center. Her research interests broadly lie in the computer architecture area with focus on energy efficiency, reliability and security. She has published extensively in the area of low-voltage AI processing using joint optimization of hardware and AI algorithms. Recently she’s been working on architectures for Fully Homomorphic Encryption.
Augusto Vega is a Senior Research Scientist at IBM T. J. Watson Research Center involved in research and development work in the areas of highly-reliable power-efficient embedded designs, cognitive systems and mobile computing. He holds a Ph.D. degree from Polytechnic University of Catalonia (UPC), Spain.
Nir Drucker is an applied cryptography researcher at IBM Research (Haifa, Israel), the AI security group. He holds a Ph.D. in applied mathematics (cryptography) from the University of Haifa and an M.Sc. degree in operations research from the faculty of Industrial Engineering & Management of the Technion I.I.T. His research interests involve applied cryptography and applied security.
DISCC will be held in conjunction with the 32nd International Symposium on High-Performance Computer Architecture (HPCA 2026). Refer to the main venue to continue with the registration process.
Sydney, NSW
Australia